DS2404B【PDF 23/29 页】IC ECONORAM TIMECHIP 5.5V 16SSOP

DS2404

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4) skip ROM or 5) search interrupt. After a ROM function sequence has been successfully executed, the

memory functions are accessible and the master may then provide any one of the four memory function

commands (Figure 6).

The “Power Control” section provides for two basic power configurations: battery operate mode and VCC

operate mode. The battery operate mode utilizes one supply connected to VBATO. The VCC operate mode

may utilize two supplies; the primary supply connects to VCC and a backup supply connects to VBATB.

DS2404 BLOCK DIAGRAM Figure 1

COMMUNICATION PORTS

Two communication ports are provided: a 1-Wire and a 3-wire port. The advantages of using the 1-Wire

port are as follows: 1) provides access to the 64-bit lasered ROM, 2) consist of a single communication

signal (I/O), and 3) multiple devices may be connected to the 1-Wire bus. The 1-Wire bus has a

maximum data rate of 16.3kbits/s and requires one 5k

Ω external pull-up.

The 3-wire port consists of three signals: RST , CLK, and DQ. RST is an enable input, DQ is bidirectional

serial data, and the CLK input is used to clock in or out the serial data. The advantages of using the

3-wire port are 1) high data transfer rate (2MHz), 2) simple timing, and 3) no external pull-up required.

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